AT24C16B

•Low-voltage and Standard-voltage Operation–1.8 (VCC = 1.8V to 5.5V)

•Internally Organized 2048 x 8 (16K)•Two-wire Serial Interface

•Schmitt Trigger, Filtered Inputs for Noise Suppression•Bidirectional Data Transfer Protocol

•1 MHz (5V, 2.5V), 400 kHz (1.8V) Compatibility•Write Protect Pin for Hardware Data Protection•16-byte Page (16K) Write Modes•Partial Page Writes Allowed

•Self-timed Write Cycle (5 ms max)•

High-reliability

–Endurance: 1 Million Write Cycles–Data Retention: 100 Years

•

8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra-Thin Mini-MAP (MLP 2x3), 5-lead SOT23, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP and 8-ball dBGA2 Packages

•Lead-free/Halogen-free

•

Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers

2.Description

The AT24C16B provides 16384 bits of serial electrically erasable and programmableread-only memory (EEPROM) organized as 2048 words of 8 bits each. The device isoptimized for use in many industrial and commercial applications where low-powerand low-voltage operation are essential. The AT24C16B is available in space-saving8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 5-leadSOT23, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, and 8-balldBGA2 packages and is accessed via a Two-wire serial interface. In addition, theAT24C16B is available in 1.8V (1.8V to 5.5V) version. Table 2-1.Pin ConfigurationPin NameFunction8-lead Ultra Thin Mini-MAP (MLP 2x3)8-ball dBGA2 A0 - A2No ConnectVCC 8 1 A0 VCC 8 1 A0 SDASerial DataWP 7 2 A1 WP 7 2 A1 SCL 6 3 A2 SCL 6 3 A2 SCLSerial Clock Input SDA 5 4 GND SDA 5 4 GND WPWrite ProtectBottom View Bottom View GNDGround8-lead TSSOP 8-lead SOIC VCCPower SupplyA0 1 8 VCC A0 1 8 VCC A1 2 7 WP A1 2 7 WP 8-lead Ultra Lead Frame A2 3 6 SCL A2 3 6 SCL Land Grid Array (ULA)GND 4 5 SDA GND 4 5 SDA VCC81A05-lead SOT238-lead PDIPWP72A1SCL63A2SCL 1 5 WP A0 1 8 VCC SDAGNDGND 2 A1 2 7 WP A2 3 6 SCL Bottom ViewSDA 3 4 VCC GND 4 5 SDA Two-wire

Serial EEPROM

16K (2048 x 8)

AT24C16B

5175C–SEEPR–11/07

Absolute Maximum Ratings

Operating Temperature..................................–55°C to +125°CStorage Temperature.....................................–65°C to +150°CVoltage on Any Pin

with Respect to Ground....................................–1.0V to +7.0VMaximum Operating Voltage..........................................6.25VDC Output Current........................................................5.0 mA

*NOTICE:

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam-age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Figure 2-1.Block Diagram

VCCGNDWPSCLSDASTARTSTOPLOGICLOADDEVICEADDRESSCOMPARATORA2A1A0R/WCOMPSERIALCONTROLLOGICENH.V. PUMP/TIMINGDATA RECOVERYINCX DECEEPROMLOADDATA WORDADDR/COUNTERY DECSERIAL MUXDINDOUTDOUT/ACKLOGIC2

AT24C16B

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AT24C16B

3.Pin Description

SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROMdevice and negative edge clock data out of each device.

SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open-collectordevices.

DEVICE/PAGE ADDRESSES (A2, A1, A0): The AT24C16B does not use the device addresspins, which limits the number of devices on a single bus to one. The A0, A1, A2 are no connectsand can be connected to ground.

WRITE PROTECT (WP): The AT24C16B has a write protect pin that provides hardware dataprotection. The write protect pin allows normal read/write operations when connected to ground(GND). When the write protect pin is connected to VCC, the write protection feature is enabledand operates as shown in Table 3-1.

Table 3-1.Write Protect

Part of the Array Protected

WP PinStatusAt VCCAt GND

24C16B

Full (16K) Array

Normal Read/Write Operations

4.Memory Organization

AT24C16B, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes each, the16K requires an 11-bit data word address for random word addressing.

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Table 4-1.Pin Capacitance(1)

Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +1.8V

SymbolCI/OCINNote:

Test Condition

Input/Output Capacitance (SDA)Input Capacitance (SCL)

1.This parameter is characterized and is not 100% tested.

Max86

UnitspFpF

ConditionsVI/O = 0VVIN = 0V

Table 4-2.DC Characteristics

Applicable over recommended operating range from: TAI = −40°C to +85°C, VCC = +1.8V to +5.5V (unless otherwise noted)

SymbolVCC1ICC1ICC2ISB1ILIILOVILVIHVOL1VOL2Notes:

ParameterSupply VoltageSupply CurrentSupply CurrentStandby Current(1.8V option)Input Leakage Current VCC = 5.0VOutput Leakage Current VCC = 5.0VInput Low Level(1)Input High Level(1)Output Low LevelOutput Low Level

VCC = 1.8VVCC = 3.0V

IOL = 0.15 mAIOL = 2.1 mA

VCC = 5.0VVCC = 5.0VVCC = 1.8VVCC = 5.0VVIN = VCC or VSSVOUT = VCC or VSS

−0.6VCC x 0.7

READ at 400 kHzWRITE at 400 kHzVIN = VCC or VSS

0.100.05

Test Condition

Min1.8

1.02.0Typ

Max5.52.03.01.06.03.03.0VCC x 0.3VCC + 0.50.20.4

µAµAVVVVUnitsVmAmAµA

1.VIL min and VIH max are reference only and are not tested.

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AT24C16B

Table 4-3.AC Characteristics (Industrial Temperature)

Applicable over recommended operating range from TAI = −40°C to +85°C, VCC = +1.8V to +5.5V, CL = 100 pF (unless oth-erwise noted). Test conditions are listed in Note 2.

1.8-volt

SymbolfSCLtLOWtHIGHtAAtBUFtHD.STAtSU.STAtHD.DATtSU.DATtRtFtSU.STOtDHtWR

Endurance(1)Notes:

Parameter

Clock Frequency, SCLClock Pulse Width LowClock Pulse Width HighClock Low to Data Out Valid

Time the bus must be free before a new transmission can start(1)Start Hold TimeStart Set-up TimeData In Hold TimeData In Set-up TimeInputs Rise Time(1)Inputs Fall Time(1)Stop Set-up TimeData Out Hold TimeWrite Cycle Time25°C, Page Mode, 3.3V

0.650

5

1,000,000

1.30.60.051.30.60.60100

0.3300

0.2550

5

0.9

Min

Max400

0.40.40.050.50.250.250100

0.31000.55

2.5, 5.0-voltMin

Max1000

UnitskHzµsµsµsµsµsµsµsnsµsnsµsnsmsWrite Cycles

1.This parameter is characterized and is not 100% tested.2.AC measurement conditions:

RL (connects to VCC): 1.3 kΩ (2.5V, 5.0V), 10 kΩ (1.8V)Input pulse voltages: 0.3 VCC to 0.7 VCCInput rise and fall times: ≤ 50 ns

Input and output timing reference voltages: 0.5 VCC

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5.Device Operation

CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an externaldevice. Data on the SDA pin may change only during SCL low time periods (see Figure 7-2 onpage 8). Data changes during SCL high periods will indicate a start or stop condition as definedbelow.

START CONDITION: A high-to-low transition of SDA with SCL high is a start condition whichmust precede any othercommand (see Figure 7-3 on page 8).

STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After aread sequence, the stop command will place the EEPROM in a standby power mode (see Fig-ure 7-3 on page 8).

ACKNOWLEDGE: All addresses and data words are serially transmitted to and from theEEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received eachword. This happens during the ninth clock cycle.

STANDBY MODE: The AT24C16B features a low-power standby mode which is enabled: (a)upon power-up and (b) after the receipt of the STOP bit and the completion of any internaloperations.

2-WIRE SOFTWARE RESET: After an interruption in protocol, power loss or system reset, any2-wire part can be protocol reset by following these steps:1.Create a start bit condition.2.Clock 9 cycles.

3.Create another start bit followed by stop bit condition as shown below.

Start bitDummy Clock CyclesStart bitStop bitSCL123SDA6

AT24C16B

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AT24C16B

6.Bus Timing

Figure 6-1.

SCL: Serial Clock, SDA: Serial Data I/O®

tFtHIGHtLOWtRSCLtSU.STAtHD.STAtLOWtHD.DATtSU.DATtSU.STOSDA INtAAtDHtBUFSDA OUT7.Write Cycle Timing

Figure 7-1.

SCL: Serial Clock, SDA: Serial Data I/O

SCL SDA 8th BITWORDn ACKtwrSTOP CONDITION Note:

(1) START CONDITION 1.The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.

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Figure 7-2.Data Validity

SDASCLDATA STABLEDATACHANGEDATA STABLEFigure 7-3.Start and Stop Definition

SDASCLSTARTSTOPFigure 7-4.Output Acknowledge

SCL1DATA INDATA OUTSTARTACKNOWLEDGE8

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AT24C16B

8.Device Addressing

The 16K EEPROM device requiresan 8-bit device address word following a start condition toenable the chip for a read or write operation (refer to Figure 10-1).

The device address word consists of a mandatory one, zero sequence for the first four most sig-nificant bits as shown. This is common to all the EEPROM devices.

The next 3 bits used for memory page addressing and are the most significant bits of the dataword address which follows.

The eighth bit of the device address is the read/write operation select bit. A read operation is ini-tiated if this bit is high and a write operation is initiated if this bit is low.

Upon a compare of the device address, the EEPROM will output a zero. If a compare is notmade, the chip will return to a standby state.

9.Write Operations

BYTE WRITE: A write operation requires an 8-bit data word address following the deviceaddress word and acknowledgment. Upon receipt of this address, the EEPROM will againrespond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit dataword, the EEPROM will output a zero and the addressing device, such as a microcontroller,must terminate the write sequence with a stop condition. At this time the EEPROM enters aninternally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during thiswrite cycle and the EEPROM will not respond until the write is complete (see Figure 10-2 onpage 11).

PAGE WRITE: The 16K EEPROM is capable of an 16-byte page write.

A page write is initiated the same as a byte write, but the microcontroller does not send a stopcondition after the first data word is clocked in. Instead, after the EEPROM acknowledgesreceipt of the first data word, the microcontroller can transmit up to fifteen data words. TheEEPROM will respond with a zero after each data word received. The microcontroller must ter-minate the page write sequence with a stop condition (see Figure 10-3 on page 11).

The data word address lower three bits are internally incremented following the receipt of eachdata word. The higher data word address bits are not incremented, retaining the memory pagerow location. When the word address, internally generated, reaches the page boundary, the fol-lowing byte is placed at the beginning of the same page. If more than sixteen data words aretransmitted to the EEPROM, the data word address will “roll over” and previous data will beoverwritten.

ACKNOWLEDGE POLLING: Once the internally timed write cycle has started and theEEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending astart condition followed by the device address word. The read/write bit is representative of theoperation desired. Only if the internal write cycle has completed will the EEPROM respond witha zero allowing the read or write sequence to continue.

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10.Read Operations

Read operations are initiated the same way as write operations with the exception that theread/write select bit in the device address word is set to one. There are three read operations:current address read, random address read and sequential read.

CURRENT ADDRESS READ: The internal data word address counter maintains the lastaddress accessed during the last read or write operation, incremented by one. This addressstays valid between operations as long as the chip power is maintained. The address “roll over”during read is from the last byte of the last memory page to the first byte of the first page. Theaddress “roll over” during write is from the last byte of the current page to the first byte of thesame page.

Once the device address with the read/write select bit set to one is clocked in and acknowledgedby the EEPROM, the current address data word is serially clocked out. The microcontroller doesnot respond with an input zero but does generate a following stop condition (see Figure 10-4 onpage 11).

RANDOM READ: A random read requires a “dummy” byte write sequence to load in the dataword address. Once the device address word and data word address are clocked in andacknowledged by the EEPROM, the microcontroller must generate another start condition. Themicrocontroller now initiates a current address read by sending a device address with theread/write select bit high. The EEPROM acknowledges the device address and serially clocksout the data word. The microcontroller does not respond with a zero but does generate a follow-ing stop condition (see Figure 10-5 on page 12).

SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a ran-dom address read. After the microcontroller receives a data word, it responds with anacknowledge. As long as the EEPROM receives an acknowledge, it will continue to incrementthe data word address and serially clock out sequential data words. When the memory addresslimit is reached, the data word address will “roll over” and the sequential read will continue. Thesequential read operation is terminated when the microcontroller does not respond with a zerobut does generate a following stop condition (see Figure 10-6 on page 12).

Figure 10-1.Device Address

16MSBP2P1P010

AT24C16B

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AT24C16B

Figure 10-2.Byte Write

Figure 10-3.Page Write

Figure 10-4.Current Address Read

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Figure 10-5.Random Read

Figure 10-6.Sequential Read

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AT24C16B

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AT24C16B

AT24C16B Ordering Information

Ordering Codes

Voltage1.81.81.81.81.81.81.81.81.81.8

Package8P38S18S18A28A28Y68D35TS18U3-1

Lead-Free/Halogen-FreeIndustrial Temperature

(-40°C to 85°C)Operating Range

AT24C16B-PU (Bulk Form Only)AT24C16BN-SH-B(1) (NiPdAu Lead Finish)AT24C16BN-SH-T(2) (NiPdAu Lead Finish)AT24C16B-TH-B(1) (NiPdAu Lead Finish)AT24C16B-TH-T (NiPdAu Lead Finish)AT24C16BY6-YH-T(2) (NiPdAu Lead Finish)

AT24C16BD3-DH-T(2) (NiPdAu Lead Finish)

(2)

AT24C16BTSU-T(2)AT24C16BU3-UU-T(2)AT24C16B-W-11(3)

Notes:

1.“-B” denotes bulk.

Die Sales

Industrial Temperature

(-40°C to 85°C)

2.“-T” denotes tape and reel. SOIC = 4K per reel. TSSOP, Ultra Thin Mini MAP, SOT23, dBGA2 = 5K per reel.

3.Available in tape and reel, and wafer form; order as SL788 for inkless wafer form. Bumped die available upon request.

Please contact Serial Interface Marketing.

Package Type

8P38S18A28Y65TS18U3-18D3

8-lead, 0.300\" Wide, Plastic Dual Inline Package (PDIP)

8-lead, 0.150\" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP)

8-lead, 2.0 mm x 3.00 mm Body, 0.50 mm Pitch, Ultra Thin Mini-MAP, Dual No Lead Package (DFN), (MLP 2x3 mm)5-lead, 2.90 mm x 1.60 mm Body, Plastic Thin Shrink Small Outline Package (SOT23)8-ball, die Ball Grid Array Package (dBGA2)

8-lead, 1.80 mm x 2.20 mm Body, Ultra Lead Frame Land Grid Array (ULA)

Options

–1.8

Low-voltage (1.8V to 5.5V)

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11.Part Marking

11.1

8-PDIP

Seal Year

TOP MARK | Seal Week

| | |

|---|---|---|---|---|---|---|---| A T M L U Y W W |---|---|---|---|---|---|---|---| 1 6 B 1

|---|---|---|---|---|---|---|---| * Lot Number

|---|---|---|---|---|---|---|---| |

Pin 1 Indicator (Dot)Y = SEAL YEAR

6: 2006 0: 2010 7: 2007 1: 2011 8: 2008 2: 2012 9: 2009 3: 2013

WW = SEAL WEEK 02 = Week 2 04 = Week 4 :: : :::: : :: : :::: :: 50 = Week 50 52 = Week 52

Lot Number to Use ALL Characters in Marking

BOTTOM MARK

No Bottom Mark

14

AT24C16B

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AT24C16B

11.2

8-SOIC

Seal Year

TOP MARK | Seal Week

| | |

|---|---|---|---|---|---|---|---| A T M L H Y W W |---|---|---|---|---|---|---|---| 1 6 B 1

|---|---|---|---|---|---|---|---| * Lot Number

|---|---|---|---|---|---|---|---| |

Pin 1 Indicator (Dot)Y = SEAL YEAR

WW = SEAL WEEK 6: 2006 0: 2010 02 = Week 2 7: 2007 1: 2011 04 = Week 4 8: 2008 2: 2012 :: : :::: : 9: 2009 3: 2013

:: : :::: :: 50 = Week 50 52 = Week 52

Lot Number to Use ALL Characters in Marking

BOTTOM MARK

No Bottom Mark

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15

11.38-TSSOP

TOP MARK

Pin 1 Indicator (Dot) |

|---|---|---|---| * H Y W W |---|---|---|---|---| 1 6 B 1 |---|---|---|---|---|

BOTTOM MARK

|---|---|---|---|---|---|---| P H

|---|---|---|---|---|---|---| A A A A A A A |---|---|---|---|---|---|---| <- Pin 1 Indicator

Y = SEAL YEAR

6: 2006 0: 2010 7: 2007 1: 2011 8: 2008 2: 2012 9: 2009 3: 2013

WW = SEAL WEEK 02 = Week 2 04 = Week 4 :: : :::: : :: : :::: :: 50 = Week 50 52 = Week 52

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AT24C16B

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11.4

8-Ultra Thin Mini-Map

TOP MARK

|---|---|---| 1 6 B |---|---|---| H 1

|---|---|---|

Y X X |---|---|---| * |

Pin 1 Indicator (Dot)Y = YEAR OF ASSEMBLY

XX = ATMEL LOT NUMBER TO COORESPOND WITHNSEB TRACE CODE LOG BOOK.

(e.g. XX = AA, AB, AC,...AX, AY, AZ)Y = SEAL YEAR

6: 2006 0: 2010 7: 2007 1: 2011 8: 2008 2: 2012 9: 2009 3: 2013

11.58-ULA

TOP MARK

|---|---|---| 1 6 B |---|---|---| Y X X |---|---|---| * |

Pin 1 Indicator (Dot)

Y = BUILD YEAR2006 = 6 2008 = 82007 = 7 Etc. . .

XX = ATMEL LOT NUMBER TO COORESPOND WITH

NSEB TRACE CODE LOG BOOK.

(e.g. XX = AA, AB, AC,...AX, AY, AZ)

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AT24C16B

17

11.6dBGA2

TOP MARK

LINE 1-------> 16BULINE 2-------> PYMTC|<-- Pin 1 This CornerP = COUNTRY OF ORIGIN

Y = ONE DIGIT YEAR CODE4: 2004 7: 20075: 2005 8: 20086: 2006 9: 2009

M = SEAL MONTH (USE ALPHA DESIGNATOR A-L)A = JANUARYB = FEBRUARY\" \" \"\"\"\"\"\"\"J = OCTOBERK = NOVEMBERL = DECEMBER

TC = TRACE CODE (ATMEL LOTNUMBERS TO CORRESPOND

WITH ATK TRACE CODE LOG BOOK)

11.7SOT23

TOP MARK

|---|---|---|---|---|

Line 1 -----------> 1 6 B 1 U|---|---|---|---|---|*|

XXX = Device

V = Voltage IndicatorU = Material Set

Pin 1 Indicator (Dot)BOTTOM MARK

|---|---|---|---|Y M T C

|---|---|---|---|

Y = One Digit Year CodeM = Seal Month

(Use Alpha Designator A-L)TC = Trace Code

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AT24C16B

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AT24C16B

12.Packaging Information

12.1

8P3 – PDIP

EE11NTop ViewceAEnd ViewCOMMON DIMENSIONS(Unit of Measure = inches)DD1eA2ASYMBOLMIN– NOMMAXNOTEA – 0.210 2A2 0.115 0.130 0.195 b 0.014 0.018 0.022 5b2 0.045 0.060 0.070 6b3 0.030 0.039 0.045 6c 0.008 0.010 0.014D 0.355 0.365 0.400 3b2b34 PLCSLD1 0.005 – – 3bE 0.300 0.310 0.325 4E1 0.240 0.250 0.280 3e 0.100 BSCeA 0.300 BSC 4L 0.115 0.130 0.150 2Side ViewNotes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA, for additional information.2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3.3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch.4. E and eA measured with the leads constrained to be perpendicular to datum.5. Pointed or rounded lead tips are preferred to ease insertion.6. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm).01/09/022325 Orchard ParkwaySan Jose, CA 95131TITLE8P3, 8-lead, 0.300\" Wide Body, Plastic Dual In-line Package (PDIP)DRAWING NO.8P3REV. B19

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12.28S1 – JEDEC SOIC

C1EE1N∅LTop ViewEnd VieweBASYMBOLCOMMON DIMENSIONS(Unit of Measure = mm)MIN1.350.100.310.174.803.815.79NOM–––––––1.27 BSC0.400˚––1.278˚MAX1.750.250.510.255.003.996.20NOTEA1AA1bCDDE1Side ViewEeL ∅Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc.10/7/031150 E. Cheyenne Mtn. Blvd.Colorado Springs, CO 80906TITLE8S1, 8-lead (0.150\" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC)DRAWING NO.8S1REV. B20

AT24C16B

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AT24C16B

12.3

8A2 – TSSOP

321Pin 1 indicatorthis cornerE1EL1NLTop ViewEnd ViewCOMMON DIMENSIONS(Unit of Measure = mm)SYMBOLMIN2.90NOM3.006.40 BSC4.30–0.800.194.40–1.00–0.65 BSC0.450.601.00 REF0.7.501.201.050.3043, 5MAX3.10NOTE2, 5bADEE1AeDA2A2beSide ViewLL1Notes:1.This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc.2.Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15 mm (0.006 in) per side.3.Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm (0.010 in) per side.4.Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5.Dimension D and E1 to be determined at Datum Plane H.5/30/022325 Orchard ParkwaySan Jose, CA 95131TITLE8A2, 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP)DRAWING NO.8A2REV. B21

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12.48Y6 - Mini MapAD2b(8X)Pin 1IndexAreaE2EPin 1 IDL (8X)DA2A3A1e (6X)1.50 REF.COMMON DIMENSIONS(Unit of Measure = mm)SYMBOL D E D2 E2 A A1 A2 A3 L e b MIN 1.40 - - 0.0 - 0.20 0.20 NOM2.00 BSC 3.00 BSC 1.50 - - 0.02 - 0.20 REF0.30 0.50 BSC 0.25 0.30 2 0.401.601.400.60 0.05 0.55MAXNOTENotes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. 3. Soldering the large thermal pad is optional, but not recommended. No electrical connection is accomplished to the device through this pad, so if soldered it should be tied to ground 10/16/07 DRAWING NO.TITLEREV. 2325 Orchard Parkway San Jose, CA 951318Y6, 8-lead 2.0 x 3.0 mm Body, 0.50 mm Pitch, Utlra Thin Mini-Map, Dual No Lead Package (DFN) ,(MLP 2x3)8Y6D22

AT24C16B

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AT24C16B

12.5

5TS1 – SOT23

e1CE1ECLL1123Top ViewEnd ViewbA2SeatingPlaneAe DA1 Side ViewNOTES:1. This drawing is for general information only. Refer to JEDEC DrawingMO-193, Variation AB, for additional information.2.Dimension D does not include mold flash, protrusions, or gate burrs.Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per end.Dimension E1 does not include interlead flash or protrusion. Interleadflash or protrusion shall not exceed 0.15 mm per side. 3.The package top may be smaller than the package bottom. DimensionsD and E1 are determined at the outermost extremes of the plastic bodyexclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, butincluding any mismatch between the top and bottom of the plastic body.4.These dimensions apply to the flat section of the lead between 0.08 mmand 0.15 mm from the lead tip.5.Dimension \"b\" does not include Dambar protrusion. Allowable Dambarprotrusion shall be 0.08 mm total in excess of the \"b\" dimension atmaximum material condition. The Dambar cannot be located on the lowerradius of the foot. Minimum space between protrusion and an adjacent leadshall not be less than 0.07 mm.SYMBOLAA1A2cDEE1L1ee1bCOMMON DIMENSIONS(Unit of Measure = mm)MIN–0.000.700.08NOM ––0.90 –2.90 BSC2.80 BSC1.60 BSC0.60 REF0.95 BSC1.90 BSC0.30–0.504, 5MAX1.100.101.000.2042, 32, 32, 3NOTE REV. 6/25/031150 E. Cheyenne Mtn. Blvd.Colorado Springs, CO 80906TITLE5TS1, 5-lead, 1.60 mm Body, Plastic Thin Shrink Small Outline Package (SHRINK SOT)DRAWING NO.PO5TS1 A23

5175C–SEEPR–11/07

12.68U3-1 – dBGA2

ED1.bPIN 1 BALL PAD CORNERA1A2ATop ViewPIN 1 BALL PAD CORNERSide View41(d1)23d8e(e1)765COMMON DIMENSIONS(Unit of Measure = mm)Bottom View8 SOLDER BALLSSYMBOLMINNOMMAXNOTEA 0.71 0.81 0.91A1 0.10 0.15 0.20 A2 0.40 0.45 0.50 b 0.20 0.25 0.30 1. Dimension “b” is measured at the maximum solder ball diameter.This drawing is for general information only. D E e e1 d d1 1.50 BSC 2.00 BSC 0.50 BSC 0.25 REF 1.00 BSC 0.25 REF 6/24/031150 E. Cheyenne Mtn. Blvd.Colorado Springs, CO 80906TITLE8U3-1, 8-ball, 1.50 x 2.00 mm Body, 0.50 mm pitch, Small Die Ball Grid Array Package (dBGA2)DRAWING NO.REV. PO8U3-1 A24

AT24C16B

5175C–SEEPR–11/07

AT24C16B

12.7

8D3 - ULA

D8765e1bLEPIN #1 ID0.10PIN #1 ID0.151234AA1eBOTTOM VIEWbTOP VIEWSIDE VIEWCOMMON DIMENSIONS(Unit of Measure = mm)SYMBOLMIN– 0.00 1.70 2.10 0.15 0.25 NOM– – 1.80 2.20 0.20 0.40 TYP 1.20 REF 0.30 MAX0.400.051.90 2.300.25NOTE A A1 D E b e e1 L 0.3511/15/051150 E. Cheyenne Mtn. Blvd.Colorado Springs, CO 80906TITLE8D3, 8-lead (1.80 x 2.20 mm Body) Ultra Leadframe Land Grid Array (ULLGA) D3 DRAWING NO.8D3REV. 025

5175C–SEEPR–11/07

13.Revision History

Lit No.5175C

Date11/2007

Comment

AT24C16B product with date code 742 or later supports 5Vcc operationAdded ULA package informationRemoved reference to Waffle PackCorrected Note 3 on Page 13

Added lines to Ordering Code tableInitial document release

5175B5175A

4/20073/2007

26

AT24C16B

5175C–SEEPR–11/07

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5175C–SEEPR–11/07