制作一个正弦信号发生器的设计

★ 项目2： 数字信号源

项目简述：设计制作一个正弦信号发生器。 （1）正弦波输出频率范围：1kHz～10MHz； （2）具有频率设置功能，频率步进：100Hz； （3）输出信号频率稳定度：优于10-2； （4）输出电压幅度：1V到5V这间； （5）失真度：用示波器观察时无明显失真。

（6）输出电压幅度：在频率范围内50负载电阻上正弦信号输出电压的峰-峰值Vopp=6V±1V；

（7）产生模拟幅度调制(AM)信号：在1MHz~10MHz范围内调制度ma可在30%～100%之间程控调节，步进量50%，正弦调制信号频率为1kHz，调制信号自行产生；

（8）产生模拟频率调制(FM)信号：在100kHz~10MHz频率范围内产生20kHz最大频偏，正弦调制信号频率为1kHz，调制信号自行产生；

（9）产生二进制PSK、ASK信号：在100kHz固定频率载波进行二进制键控，二进制基带序列码速率固定为10kbps，二进制基带序列信号自行产生； 开发时间：2007 开发人数：1

运行环境：windows xp、Quartus II 相关内容：（还未整体综合）

下面是调幅原理图：

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路漫漫其修远兮，吾将上下而求索 -

p0[7..0]INPUTVCCGNDlpm_add_sub0dataa[31..0]Aresult[31..0]A+Bdatab[31..0]Bcoutinst1lpm_dff0data[31..0]clockq[31..0]inst9DFFqaa[31..0]qaa[31..20]xsj1data[7..0]oencskc[3..0]cskf[3..0]inst27cs[3..0]cs[7..4]NOTkc[31..0]kf[31..0]adcinst2741ALE1INPUTVCCcs0cs1cs2GNDALE2INPUTVCCALE3INPUTVCCABCDG1NG2NALE4INPUTVCCO0NO1NO2NO3NO4NO5NO6NO7NO8NO9NO10NO11NO12NO13NO14NO15Ninst28NOTinst17NOTinst25NOTcs3cs4cs5cs6cs7cs8cs9cs9lpm_add_sub0dataa[31..0]inst26NOT74373bcs8inst31NOTinst30NOTOEND[8..1]GQ[8..1]ma[7..0]Aresult[31..0]A+Bdatab[31..0]Bcoutinst3lpm_dff0data[31..0]clockq[31..0]inst11DFFqab[31..0]qab[31.inst6OCTAL LATCHESinst29NOTinst32NOT74373bOEND[8..1]GQ[8..1]ma[15..8]inst34DECODERGNDinst33NOTaltpll_0inst35clkINPUTVCCinst12OCTAL LATCHESinclk0inclk0 frequency: 50.000 MHzOperation Mode: NormalClk RatioPh (dg)DC (%)c04/10.0050.00c12/10.0050.00c0c1NOTOUTPUTdaclkinst24inst23Cyclone下面是调频原理图：

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clk333 qd[23..0]OptionValueLocationPIN_28OptionLocationLocationLocationLocationLocationLocationLocationLocationdataa[23..0]inst16ValuePIN_2PIN_4PIN_6PIN_8PIN_12PIN_14PIN_16PIN_18dataa[23..0]inst15p0[7..0]lpm_add_sub0lpm_add_sub0Aresult[23..0]A+Bdatab[23..0]BAresult[23..0]A+Bdatab[23..0]BINPUTVCCOption...Value...LocationPIN_44CSKC[2..0]CSKF[2..0]INPUTVCC 下面是正弦信号发生器 OptionLocationLocationLocationValuePIN_20PIN_23PIN_42inst9INPUTVCCINPUTVCCdata[23..0]clocklpm_dff0GNDGNDq[23..0]DFFinst10lpm_add_sub1dataa[47..0]lpm_dff0DFFqq[47..0]data[23..0]clockxsj1kc[47..0]data[47..0]clockq[47..0]xsj1instlpm_dff0p0[7..0]INPUTVCCcs[5..0]Aresult[47..0]A+Bdatab[47..0]BQQ[23..0]data[7..0]cskc[2..0]cskf[2..0]oendata[7..0]cskc[5..0]oenq[23..0]inst3inst8DFFinstGNDsin_rom0qq[31..20]kc[23..0]kf[23..0]74373bQ[8..1]qa[7..0]inst2cs6nst6OptionLocationLocationLocationLocationLocationLocationLocationLocationaddress[11..0]clockq[9..0]OEND[8..1]Gqu[23..0]inst2QQ[23..12]ValuePIN_2PIN_4PIN_6PIN_12PIN_14PIN_16PIN_18PIN_8qb[23..0]OptionValueLocationPIN_23OCTAL LATCHESlpm_mult0dataa[9..0]result[25..0]qa[15..0]qout[9..0]dz0INPUTVCCNOTcs0address[11..0]clockinst2074373bQ[8..1]datab[15..0]inst16Unsignedmultiplicationqou[9..0]OptionLocationLocationLocationLocationLocationLocationLocationLocationLocationLocationOUTPUTValuePIN_166PIN_165PIN_168PIN_167PIN_170PIN_169PIN_174PIN_173PIN_176PIN_175qout[9..0]qa[15..8]sin_rom0OptionValueLocationPIN_42cs7inst10OCTAL LATCHESNOTdz1INPUTVCC74138cs1inst17qu[23..12]q[9..0]NOTcs2OEND[8..1]GOptionValueLocationPIN_44inst18dz2INPUTVCCNOTcs3inst3inst19NOTNOTNOTcs4qa[14..5]inst23VCCinst25clkINPUTVCCNOTcs5OUTPUTdaclkinst24qa[23..15]GND路漫漫其修远兮，吾将上下而求索 -

sin_rom0qb[23..0]GNDY0NAY1NBY2NCY3NG1Y4NG2ANY5NG2BNY6NY7Nnst53:8 DECODERaddress[11..0]clockinst23NOTcs6OptionValueLocationPIN_28OptionValueLocationPIN_180inst22qa[23..0]OUTPUTq[9..0]NOTcs7inst26qa[4..0]inst17GNDdataa[23..0]lpm_add_sub0Aresult[23..0]qd[23..0]A+Bdatab[23..0]BdaclkOUTPUTqout[9..0]设计原理图： OptionValueLocationPIN_180OptionLocationLocationLocationLocationLocationLocationLocationLocationLocationLocationValuePIN_175PIN_176PIN_173PIN_174PIN_169PIN_170PIN_167PIN_168PIN_165PIN_166路漫漫其修远兮，吾将上下而求索 -

下面是PSK设计原理图：

OptionLocationLocationLocationLocationLocationLocationLocationLocationValuePIN_2PIN_4PIN_6PIN_12PIN_14PIN_16PIN_18PIN_8lpm_add_sub1GNDdataa[47..0]xsj1p0[7..0]INPUTVCCcs[5..0]data[7..0]cskc[5..0]oeninstkc[47..0]Aresult[47..0]A+Bdatab[47..0]Binst3lpm_dff0data[47..0]clockinst8DFFqq[47..0]sin_rom0address[11..0]clockinst2qou[9..0]lpm_mult0q[9..0]qa[15..0]dataa[9..0]result[25..0]datab[15..0]inst16Unsignedmultiplicationq[47..0]GNDdz3_pskINPUTVCCpsk74373bcs6OptionValueLocationPIN_23dz0INPUTVCCOEND[8..1]Ginst6Q[8..1]qa[7..0]VCClpm_add_sub2dataa[11..0]qq[31..20]AA-BBresult[11..0]NOTcs0cs1cs2cs7cs3cs4cs5cs6cs7OCTAL LATCHESdatab[11..0]inst1inst20NOTdatain_h[11..0]datain_l[11..0]outclockaltddio_bidir0ddiobidirpower uphighpadio[11..0]OptionValueLocationPIN_42dz1dz2INPUTVCCINPUTVCC74138Y0NAY1NBY2NCY3NG1Y4NG2ANY5NG2BNY6NY7Ninst53:8 DECODERinst17NOT74373bOEND[8..1]GQ[8..1]qa[15..8]inst4pskinst18NOTOptionValueLocationPIN_44inst19NOTinst10OCTAL LATCHESqou[9..0]inst25NOTOUTPUTqout[9..0]OptionLocationLocationLocationLocationLocationLocationLocationLocationLocationLocationValuePIN_166PIN_165PIN_168PIN_167PIN_170PIN_169PIN_174PIN_173PIN_176PIN_175inst23NOTVCCGNDinst22NOTinst26clkINPUTVCCNOTOptionValueLocationPIN_180OUTPUTdaclkOptionValueLocationPIN_28inst24

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