Gigabit switch on chip architecture

专利名称：Gigabit switch on chip architecture发明人：Govind Malalur,Shiri Kadambi,Shekhar

Ambe,Mohan Kalkunte

申请号：US11490109申请日：20060721

公开号：US20060274786A1公开日：20061207

专利附图：

摘要：A data switch for network communications includes a first data port interfacewhich supports at least one data port which transmits and receives data. A second dataport interface is also provided supporting at least one data port transmitting andreceiving data. A CPU interface is provided, with the CPU interface configured to

communicate with a CPU. A common memory is provided, and communicates with the firstdata port interface and the second data port interface. A memory management unit isprovided, and communicates data from the first data port interface and the second dataport interface and an common memory. At least two sets of communication channels areprovided, with each of the communication channels communicating data and messaginginformation between the first data port interface, the second data port interface, and the

memory management unit. One set of communication channels provides communicationfrom the first and second data port interfaces to the memory management unit and theother set of communication channels provides communication from the memorymanagement unit to the first and second data port interfaces.

申请人：Govind Malalur,Shiri Kadambi,Shekhar Ambe,Mohan Kalkunte

地址：Fremont CA US,Los Altos CA US,San Jose CA US,Sunnyvale CA US

国籍：US,US,US,US

更多信息请下载全文后查看