www.kcttek.com Preliminary Datasheet LP28501 2.5A Synchronous Buck Li-ion Charger With Intelligent Path Management and Adapter Adaptive General Description The LP28501 is a 2.5A Li-Ion battery charger intended for 4.7V~14V wall adapters. It utilizes a high efficiency synchronous buck converter topology to reduce power dissipation during charging. The LP28501 includes complete charge termination circuitry, automatic recharge and a ±1% 4.2V/4.3V /4.35V float voltage. The LP28501 could manage the power supply for system intelligently. The adapter would satisfy the system`s demand firstly, then charge battery with extra current output capacity from adapter. If the current capacity of adapter could not meet the system demand, the adapter and battery would supply power for system together. When the adapter`s current capacity is low than the set charge current, the LP28501 would decrease the charge current automatically to keep the output of adapter would not be pull down by the chip. Additional features include shorted cell detection; temperature qualified charging and overvoltage protection. The LP28501 is available in a low profile QFN-28 package. Features Power Path Management Intelligently Adapter Adaptive CHARGE: Very Low Power Dissipation 2.5A Maximum Charge Current Efficiency up to 90% Input voltage: 4.7V~14V Programmable charge complete voltage: 4.2V /4.3V /4.35V ¾ Operation with Thermal Regulation to Maximize Charge Rate Without Risk of Overheating ¾ Charges Single Cell Li-Ion Batteries Directly from USB Port Available in QFN28(4*4mm) Package RoHS Compliant and 100% Lead (Pb)-Free ¾ ¾ ¾ ¾ ¾ Functional Pin Description Order Information LP28501 □ □ □ F: Pb-Free Package Type QV: QFN-28 Applications Quick charge 2.0/3.0 (QC2.0 / QC3.0) Portable Media Players Cellular and Smart mobile phone PDA/DSC Handheld Battery-Powered Devices Handheld Computers Charging Docks and Cradles Device LP28501QVF TOP VIEW Marking Information Marking website. Y: Year code. W: Week code. X: Batch numbers. Package Shipping3K/REELPlease visit our QFN-28 文章来源：科创达 LP28501–00 Version 1.0 Feb.-2016
www.kcttek.com Preliminary Datasheet LP28501 Pin Description Pin Name 1 2 3 4 5 6 7 8 9 VDDP BST LX HDR GNDP LDR STAT NTC COMP Description Internal LDO output. Connect a decoupling 4.7uF capacitor to GNDP. Positive supply for the high side driver. A 0.22µF capacitor should be placed between BST and LX. Switching Node Connection. High side drive gate. Ground for Power section. Low side drive gate. Indicates charge status. Active low when charging is on. STAT will blink with timeout, vsysovp, NTC fault. Connect a 10K NTC resistor to GNDA, 100uA(constant current source) current output from NTC pin. Compensation pin, a 2.2nF ceramic capacitor is needed from COMP to GNDA. Input voltage feedback for the input voltage regulation loop. Connect to tap of an external resistor divider from VBUS to GNDA to program the input voltage regulation. Once the voltage at REG pin drops to the inner threshold, the charge current is reduced to maintain the input voltage at the regulation value. Adapter current limit setting pin. A resistor RLIMT is needed from Rilim to GNDA. Adapter current is 2Vprogrammed byI. The limit input current will be 2A when this pin floating. LIMT(A)=550×Rilim(Ω)Charging current setting pin, a resistor RISET is needed from Riset to GNDA. CC current is 12 Riset programmed by ICHG10 REG 11 Rilim (A)=570×1.5V . The internal reference for Riset comparator is 1.5V RISET(Ω)when Vbat > VTRIKL. 13,20,29 14 15 16 17 19 18,20 21,22 23,24 25,26 27,28 GNDA FULL VB SYSSEL CE IREF VDDA VBAT VSYS VBUS VDC Ground for the analog circuits. Battery full indication pin, active low. Programmable battery-full voltage. Connect to GND for 4.35V,leave floating to 4.2V, and connect to VDDA for 4.3V. Programmable system minimum voltage. Connect to GND for 3V,leave floating to 3.3V, and connect to VDDA for3.5V. Charge enable pin. Active high or floating. Current reference generator. A 100k resistor connect to GNDA, internal voltage reference is 1V. Power supply for the internal analog circuit. Battery charger output and battery voltage sense pin. Connect to battery cell. System voltage output. USB or adapter input. A capacitor is needed from this pin to GNDP. 文章来源：科创达 LP28501–00 Version 1.0 Feb.-2016
www.kcttek.com Preliminary Datasheet LP28501 Absolute Maximum Ratings Note 1 Input and Vout to GND(VDC,VBUS) ----------------------------------------------------------------------------------------------- -0.3V to 18V Other Pin to GND------------------------------------------------------------------------------------------------------------------------ -0.3V to 6.5V LX voltage to GND----------------------------------------------------------------------------------------------------------------------- -0.3V to 18V HDR,BST voltage to GND-------------------------------------------------------------------------------------------------------------- -0.3V to 23V BST referred to LX--------------------------------------------------------------------------------------------------------------------- -0.3V to 6.5V BAT Short-circuit Duration---------------------------------------------------------------------------------------------------------------- Continuous Maximum Junction Temperature ------------------------------------------------------------------------------------------------------------- 150°C Storage Temperature ---------------------------------------------------------------------------------------------------------------- -45℃ to 165℃ Operating Junction Temperature Range (TJ) ----------------------------------------------------------------------------------- -40℃ to 85°C Maximum Soldering Temperature (at leads, 10 sec) ------------------------------------------------------------------------------------ 260°C ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress Thermal Information Maximum Power Dissipation (QFN-28, PD,TA=25°C) --------------------------------------------------------------------------------- 2.5W Thermal Resistance (QFN-28, JA) --------------------------------------------------------------------------------------------------------- 50℃/W ESD Susceptibility Note 2 HBM(Human Body Mode) -------------------------------------------------------------------------------------------------------------- 2KV MM(Machine Mode) JEDEC. Note 3. Machine Model (MM) is a 200pF capacitor discharged through a 500nH inductor with no series resistor into each pin. The testing is done according JEDEC. Note 3---------------------------------------------------------------------------------------------------------------------- 200V Note 2. The Human body model (HBM) is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. The testing is done according Electrical Characteristics (The specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Vin = 5V, unless otherwise noted.) Limits Parameter Test Conditions Measured UnitsMinTypMax VBUS, VSYS,VDD Input voltage Vbus 4.7 14 V VBUS Rising 4.15 4.25 4.35 VBUS port protection UVLO V threshold VBUS Falling 3.95 4.05 4.15 Input voltage regulation Vreg 2.3 2.4 2.5 V reference SYSSEL = float, Vbat=2V 3.3 V VSYS over voltage SYSSEL = high, Vbat=2V 3.5 V protection SYSSEL = low, Vbat=2V 3.0 V VDDP/VDDA 5 V POWER PATH MANAGEMENT VDC Power by USB/Adapter MOSFET Rdson Switch between VSYS and VBAT 1A current Load Vbat=4.2V, VBUS absent, Ibat=3A R(VBUS,VDC) R(VSYS, VBAT) - 50 40 mΩ mΩ 文章来源：科创达 LP28501–00 Version 1.0 Feb.-2016
www.kcttek.com Preliminary Datasheet LP28501 QUIESCENT CURRENTS VBUS Current Battery Discharge Current in VBUS=4V VBAT=4.2V, VBUS absent Vbat<1.4V 1.4V www.kcttek.com Preliminary Datasheet LP28501 文章来源：科创达 LP28501–00 Version 1.0 Feb.-2016 www.kcttek.com Preliminary Datasheet LP28501 Charge waveform: Ibat=2.5A, Vbus=5V Charge waveform: Ibat=2.5A, Vbus=9V Charge waveform: Ibat=2.5A, Vbus=12V 文章来源：科创达 LP28501–00 Version 1.0 Feb.-2016 www.kcttek.com Preliminary Datasheet LP28501 Application InformationThe LP28501 is an easy controlled power path management device and a single cell Li-Ion battery charger. It integrates the input reverse-blocking FET, high-side switching FET, lowside switching FET, and BATFET between system and battery. The device also integrates the bootstrap diode for the high-side gate drive. this six STATES. STATE Without Battery Charging Charge complete Battery overheat Time out Vreg < Vreg(th) STAT Flicker Light On Light Off Flicker Flicker Light On FULL Light On Light Off Light On Light Off Light Off Light Off Device Power Up Power Up from Battery without DC Source If only battery is present and the voltage is above depletion threshold, the BATFET turns on and connects battery to system. The REGN LDO stays off to minimize the quiescent current. The low RDSON in BATFET and the low quiescent current on BAT minimize the conduction loss and maximize the battery run time. Power Up from DC Source When the DC source plugs in, the LP28501 checks the input source voltage to turn on REGN LDO and all the bias circuits. It also checks the input current limit before starts the buck converter. Input Source Qualification After REGN LDO powers up, the LP28501 checks the current capability of the input source. The input source has to meet the following requirements to start the buck converter. 1. VBUS voltage below 14V 2. VREG voltage above 2.43V Once the input source passes all the conditions above, the a permit signal is asserted to the chip. Input Current Limit Detection The USB ports on personal computers are convenient charging source for portable devices (PDs). If the portable device is attached to a USB host, the USB specification requires the portable device to draw limited current (100mA/500mA in USB 2.0, and 150mA/900mA in USB 3.0). If the portable device is attached to a charging port, it is allowed to draw up to the maximum current form the USB host by two parts limit： 1. VREG voltage above 2.43V 2. The maximum input current < ILIMIT Dynamic Power Management To meet maximum current limit in USB spec and avoid over loading the adapter, the LP28501 features Dynamic Power Management (DPM), which continuously monitors the input current and input voltage. When input source is over-loaded because the charge current is too large, either the current exceeds the input current limit or the voltage falls below the input voltage limit by detection from REG. The device then reduces the charge current until the REG voltage rises above the threshold voltage and the input current is less than the current limit. Power Path Management The LP28501 accommodates a wide range of input sources from USB to wall adapter. The device provides automatic power path selection to supply the system (SYS) from input source (VBUS), battery (BAT), or both. If the system current and the input current limit is large than the adapter current limit, the adapter voltage would be pulled down by this large system current. Battery Charging Management The LP28501 charges 1-cell Li-Ion battery with up to 2.5A charge current for high capacity tablet battery. The low dissipation BATFET improves charging efficiency and minimizes the voltage drop during discharging. Autonomous Charging Cycle With battery charging enabled, the LP28501 can complete a charging cycle. The charger device automatically terminates the charging cycle when the charging current is below termination threshold and charge voltage is above recharge threshold. When a full battery voltage is discharged below recharge threshold 0.15V, the LP28501 automatically starts another charging cycle. The STAT output indicates the charging status of charging (LOW), charging complete or charge disable (HIGH) or charging fault (Blinking). The three state indicates the different charging phases: low-charging, high-charge complete, blink-charge fault. Another charge down indication is FULL(low when charge complete or without battery). VSYS and Narrow VDC Architecture The device deploys Narrow VDC architecture (NVDC) with BATFET separating system from battery. The minimum system voltage is set by battery voltage. With a not fully depleted battery, the system is regulated (RBATFET * IBAT TO SYS)V less than the battery voltage. And a selectable VSYS could be set by SYSSEL when battery is fully depleted and adapter is applied to VBUS. Charge state indication As showed below, the STAT and FULL LED respond to Battery Charging Profile The device charges the battery in three phases: 文章来源：科创达 LP28501–00 Version 1.0 Feb.-2016 www.kcttek.com Preliminary Datasheet LP28501 preconditioning, constant current and constant voltage. At the beginning of a charging cycle, the device checks the battery voltage and applies current. If the charger device is in DPM regulation or thermal regulation during charging, the actual charging current will be less than the programmed value. In this case, termination is temporarily disabled and the charging safety timer is counted. Input Current Limit on Rilim and Iiset For safe operation, the LP28501 has an additional hardware pin on ILIM to limit maximum input current on ILIM pin. The input maximum current is set by a resistor from ILIM pin to ground as: Battery Temperature Detection The LP28501 continuously monitors battery temperature by measuring the voltage between the NTC pins and ground, typically determined by a negative temperature coefficient thermistor and an external voltage divider. The device compares this voltage against its internal thresholds to determine if charging is allowed. To initiate a charge cycle, the battery temperature must be within the VLTF to VHTF thresholds. There is a constant current flowing out form this source in NTC which is 100uA（INTC） pin. So VNTC is INTC*RNTC. When the NTC fault occurs, the STAT pin will blink to indicate the fault. IALMT(A)=550× 2VRilim(Ω) ISET ramming Charge Current The charge current is RISET rammed using a single resistor from the RISET pin to ground. The battery charge current is 570 times the current out of the RISET pin. The RISET ram resistor and the charge current are calculated using the following equations: ICHG(A)=570× 1.5V RISET(Ω) Note: VRISET is 1.5Volts when VBAT>VTRIKL. Packaging Information QFN-28 文章来源：科创达 LP28501–00 Version 1.0 Feb.-2016 www.kcttek.com Preliminary Datasheet LP28501 文章来源：科创达 LP28501–00 Version 1.0 Feb.-2016 因篇幅问题不能全部显示，请点此查看更多更全内容
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