; ENTRY
EXPORT INT_Initialize INT_Initialize
;
; /* Insure that the processor is in supervisor mode. */ ;
IF (:LNOT: :DEF: NU_UDB_SUPPORT) MOV a1, #0x17 SWI 0x123456 ENDIF
EXPORT StartPointAfterPowerOffWakeUp
StartPointAfterPowerOffWakeUp
;add by chenkai , set default value for interrupt controller
ldr r0,= GPACON
ldr r1,= 0x7fffff ;I/O(A) for ever don't used for I/O str r1,[r0] ldr r1,[r0] ;I/O(A) for used for I/O ;ldr r0,= GPADAT
;ldr r1,= 0x7fffff ;I/O(A) for ever don't used for I/O ;str r1,[r0]
;test port_A ldr r0,= BWSCON
ldr r1,= (BCON_7 + BCON_6 + BCON_5 + BCON_4 + BCON_3 + BCON_2 + BCON_1 + BCON_0) str r1,[r0]
ldr r0,= BANKCON1 ldr r1,= BANK1_CON str r1,[r0]
LDR a1,= BANKCON2 ; Get
LDR a2,= 0x7ff0 ;支持的ide str a2,[a1] LDR a1,= BANKCON4 ; Get
LDR a2,= 0x7ff0 ;支持的ide str a2,[a1] ldr r0,=GPBCON ldr r1,[r0]
orr r1,r1,#0x1 str r1,[r0]
;disable mmu
;mrc p15,0,r0,c1,c0,0
;bic r0,r0,#1 ;#R1_M ;mcr p15,0,r0,c1,c0,0
ldr r0,=WTCON ;watch dog disable ldr r1,=0x0 str r1,[r0] ldr r0,=INTMSK
ldr r1,=0xffffffff ;all interrupt disable str r1,[r0]
ldr r0,=SRCPND ;Clear SRCPND register, 2002/04/10 str r1,[r0]
ldr r0,=INTPND str r1,[r0] ;Clear SRCPND register, 2002/04/10 ldr r0,=INTSUBMSK ldr r1,=0x7ff ;all sub interrupt disable, 2002/04/10
str r1,[r0]
ldr r0,=SUSSRCPND str r1,[r0] ;encahe i data mrc p15,0,r0,c1,c0,0 orr r0,r0,#R1_I mcr p15,0,r0,c1,c0,0
;Define GBLL flag
GBLL NU_S3C2410_MEMCFG
NU_S3C2410_MEMCFG SETL {TRUE}
IF (NU_S3C2410_MEMCFG={TRUE})
;
;//////////////////////// for Nucleus//////////////////////////////
MRS a1,CPSR ; Pickup current CPSR BIC a1,a1,#MODE_MASK ; Clear the mode bits
ORR a1,a1,#SUP_MODE ; Set the supervisor mode bits ORR a1,a1,#LOCKOUT ; Insure IRQ/FIQ interrupts are ; locked out MSR CPSR_cxsf,a1 ; Setup the new CPSR
;////////////////////////////////////////////////////////////////// ;///////////////////////for S3C2410//////////////////////////////// ;
; /* Initialize memory values. Any intial values for any intialized ; variables are copied from ROM to RAM. In addition, this code ; clears the un-initialized global and static C data areas.
; Please see ARM User Guide Chapter 13, Writing Code for ROM ; for more details. */
ldr r0,=LOCKTIME ldr r1,=0x00; 0xffffff str r1,[r0]
ldr r0,=MPLLCON ldr r1,[r0]
ldr r1,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV) ;Fin=12MHz,Fout=135MHz str r1,[r0]
ldr r0,=CLKSLOW mov r1,#0x00 str r1,[r0]
ldr r0,=CLKDIVN ldr r1,=0x3 str r1,[r0]
ldr r0,=CLKCON
ldr r1,=0x7fff0 ;FOR SPI\\IIC\\IIS\\ADC\\RTC\\USB dev\\UARTn\\GPIO etc,rPCLK enable ;USB HOST\\LCDC\\NAND-FLASH etc,rHCLK enable str r1,[r0] ELSE ENDIF
;
LDR a1,[pc, #ROM_Data_Start_Ptr-.-8]; Get the start of the LDR a2,[pc, #RAM_Start_Ptr-.-8] ; Get the start of the LDR a4,[pc, #BSS_Start_Ptr-.-8] ; Pickup the start of CMP a1,a2 ; Check for any initial ; variable values BEQ INT_BSS_Clear ; If none, zero memory ;
INT_ROM_Vars_Copy
CMP a2,a4 ; Check to set flags LDRCC a3, [a1], #4 ; Get value from ROM STRCC a3, [a2], #4 ; Put value in RAM BCC INT_ROM_Vars_Copy ; Continue ;
INT_BSS_Clear ;
INT_BSS_Clear_Loop
CMP a4,a2 ; Are the start and end equal? STRCC a3,[a4],#4 ; Clear a word
BCC INT_BSS_Clear_Loop ; If so, continue with BSS clear LDR a2,[pc, #BSS_End_Ptr-.-8] ; Pickup the end of the BSS area MOV a3,#0 ; Clear value in a3
; /* Setup the vectors loaded flag to indicate to other routines in the ; system whether or not all of the default vectors have been loaded. ; If INT_Loaded_Flag is 1, all of the default vectors have been loaded. ; Otherwise, if INT_Loaded_Flag is 0, registering an LISR cause the ; default vector to be loaded. In the ARM60 this variable is always ; set to 1. All vectors must be setup by this function. */ ; INT_Loaded_Flag = 0; ;
MOV a1,#1 ; All vectors are assumed loaded LDR a2,[pc, #Loaded_Flag-.-8] ; Build address of loaded flag STR a1,[a2,#0] ; Initialize loaded flag
;
;/* Here we save the previous Vectors. This is done in case the vectors are ; needed later. One case might be to enable printf under Angel. For ARM's ; printf function to operate correctly, we need to have the original SWI ; vector handler. */ ;
MOV a3,#0x04 ; Get Undef Instr 'LDR' vector location LDR a1,[a3,#0] ; Get the instruction of the current ; Undef Instruct handler LDR a2,=OLD_UNDEF_VECT ; Get address of variable STR a1,[a2,#0] ; Save old Undef Inst handler
MOV a3,#0x24 ; Get location of Undef Instr ISR addr LDR a1,[a3,#0] ; Load ISR value
LDR a2,=OLD_UNDEF_ADDR ; Get address of variable ; into variable
STR a1,[a2,#0] MOV a3,#0x08 LDR a1,[a3,#0] LDR a2,=OLD_SWI_VECT STR a1,[a2,#0] MOV a3,#0x28 LDR a1,[a3,#0] LDR a2,=OLD_SWI_ADDR STR a1,[a2,#0] MOV a3,#0x18 LDR a1,[a3,#0] LDR a2,=OLD_IRQ_VECT STR a1,[a2,#0] MOV a3,#0x38 LDR a1,[a3,#0] LDR a2,=OLD_IRQ_ADDR STR a1,[a2,#0] MOV a3,#0x1C LDR a1,[a3,#0] LDR a2,=OLD_FIQ_VECT STR a1,[a2,#0] MOV a3,#0x3C LDR a1,[a3,#0] LDR a2,=OLD_FIQ_ADDR ; Save old Undef Instruct ISR addr into
; variable ; Get the SWI 'LDR' vector location ; Get the instruction of the current
; SWI handler ; Get address of variable ; Save old SWI handler ; into variable ; Get location of SWI ISR addr ; Load ISR value
; Get address of variable
; Save old SWI ISR addr into ; variable ; Get the IRQ 'LDR' vector location ; Get the instruction of the current ; IRQ handler
; Get address of variable ; Save old IRQ handler ; into variable ; Get location of IRQ ISR addr ; Load ISR value
; Get address of variable ; Save old IRQ ISR addr into
; variable ; Get the FIQ 'LDR' vector location ; Get the instruction of the current ; SWI handler ; Get address of variable ; Save old FIQ handler
; into variable
; Get location of FIQ ISR addr ; Load ISR value
; Get address of variable
STR a1,[a2,#0] ; Save old FIQ ISR addr into
; variable
;/* This code actually copies the 'LDR pc, address' instructions ; and the associated addresses to location 0. Nucleus PLUS ; uses the IRQ vector for the system timer and serial, and ; PLUS also supports FIQ interrupts.
; All other vectors are copied for completeness. ; Reference interrupt handlers for Undefined Instruction, ; SWI, Prefetch Abort, Data Abort, are provided at the ; bottom of this file.
;
; Please see ARM User Guide Chapter 13, Writing Code for ROM ; for more details. ;*/ ;
MOV ADR
v5,#0
v6,INT_Vectors
;a1<-[v6],a2<-[v6+1],a3<-[v6+2],a4<-[v6+3]...
LDMIA v6!,{a1-v4}
STMIA v5!,{a1-v4} ;[v5]<-a1,[v5+1]<-a2,[v5+2]<-a3,[v5+3]<-a4,...
LDMIA v6!,{a1-v4} STMIA v5!,{a1-v4}
; /* Initialize the system stack pointers. This is done after the BSS is ; clear because the TCD_System_Stack pointer is a BSS variable! It is ; assumed that available memory starts immediately after the end of the ; BSS section. */
;System_Stack
; DCD TCD_System_Stack ;
;System_Limit ; ; ; ;
DCD TCT_System_Limit
;BSS_End_Ptr
DCD |Image$$ZI$$Limit|
;SYSTEM_SIZE EQU 8*1024 ; Define the system stack size ;IRQ_STACK_SIZE EQU 4*1024 ; Number of bytes in IRQ stack ;FIQ_STACK_SIZE EQU 4*1024 ; Number of bytes in FIQ stack. ;
;|Image$$ZI$$Limit|---------------------------------低地址
; ; SYSTEM_SIZE = 8*1024 ----------------------------------高地址
; IRQ_STACK_SIZE = 4*1024 ;IRQ stack pointer---------------------------------- ; FIQ_STACK_SIZE = 4*1024 ;FIQ stack pointer----------------------------------
;(HISR_Stack_Ptr) ---------------------------------低地址 ; ;
TIMER_SIZE = 8*1024
;################################################################################### ;#
# ;# 设置系统堆栈区域 # ;# （#BSS_End_Ptr ～ #BSS_End_Ptr＋SYSTEM_SIZE）
# # ;###################################################################################
;#BSS_End_Ptr-.-8改为NEW_STACK_START ;
LDR a1,=NEW_STACK_START ; Pickup the ending address of BSS ADD a1,a1,pc ; Pickup the ending address of BSS MOV a2,#SYSTEM_SIZE ; Pickup system stack size SUB a2,a2,#4 ; Subtract one word for first addr ADD a3,a1,a2 ; Build start of system stack area BIC a3,a3,#3 ; Insure word aligment of stack MOV v7,a1 ; Setup initial stack limit LDR a4,[pc, #System_Limit-.-8] ; Pickup sys stack limit addr STR v7,[a4, #0] ; Save stack limit
;################################################################################### ;#
设置初始堆栈指针
#
;###################################################################################
MOV sp,a3 ; Setup initial stack pointer
LDR a4,[pc, #System_Stack-.-8] ; Pickup system stack address
STR sp,[a4, #0] ; Save stack pointer
;##############################################################################
##### ;#
设置IRQ堆栈
#
;###################################################################################
MOV a2,#IRQ_STACK_SIZE ; Pickup IRQ stack size in bytes ADD a3,a3,a2 ; Allocate IRQ stack area BIC a3,a3,#3 ; Insure word alignment MRS a1,CPSR ; Pickup current CPSR BIC a1,a1,#MODE_MASK ; Clear the mode bits ORR a1,a1,#IRQ_MODE ; Set the IRQ mode bits MSR CPSR_cxsf,a1 ; Move to IRQ mode MOV sp,a3 ; Setup IRQ stack pointer
;################################################################################### ;#
设置FIO堆栈
#
;###################################################################################
MOV a2,#FIQ_STACK_SIZE ; Pickup FIQ stack size in bytes ADD a3,a3,a2 ; Allocate FIQ stack area BIC a3,a3,#3 ; Insure word alignment MRS a1,CPSR ; Pickup current CPSR BIC a1,a1,#MODE_MASK ; Clear the mode bits ORR a1,a1,#FIQ_MODE ; Set the FIQ mode bits MSR CPSR_cxsf,a1 ; Move to the FIQ mode MOV sp,a3 ; Setup FIQ stack pointer
;################################################################################### ;#
设置为超级用户模式
#
;###################################################################################
MRS a1,CPSR ; Pickup current CPSR BIC a1,a1,#MODE_MASK ; Clear mode bits
ORR a1,a1,#SUP_MODE ; Set the supervisor mode bits
MSR CPSR_cxsf,a1 ; All interrupt stacks are setup, ; return to supervisor mode ;
; /* Define the global data structures that need to be initialized by this ; routine. These structures are used to define the system timer ; management HISR. */
; TMD_HISR_Stack_Ptr = (VOID *) a3; ; TMD_HISR_Stack_Size = TIMER_SIZE; ; TMD_HISR_Priority = TIMER_PRIORITY; ;
;
;####################################################################################
;# Setup timer HISR stack pointer #
;####################################################################################
LDR a4,[pc,#HISR_Stack_Ptr-.-8] ; Pickup variable's address
ADD a3,a3,#4 ; Increment to next available word
STR a3,[a4, #0] ; Setup timer HISR stack pointer
;#################################################################################### ;#
Setup timer HISR stack size
#
;#################################################################################### MOV a2,#TIMER_SIZE ; Pickup the timer HISR stack size
BIC a2,a2,#3 ; Insure word alignment
ADD a3,a3,a2 ; Allocate the timer HISR stack
; from available memory LDR a4,[pc,#HISR_Stack_Size-.-8] ; Pickup variable's address STR a2,[a4, #0] ; Setup timer HISR stack size
;#################################################################################### ;#
Setup timer HISR priority
#
;####################################################################################
;
; /* This code is provided as an example of how to copy only one vector
MOV a2,#TIMER_PRIORITY ; Pickup timer HISR priority (0-2) LDR a4,[pc,#HISR_Priority-.-8] ; Pickup variable's address STR a2,[a4, #0] ; Setup timer HISR priority
; ; ; ; ; ; ; ; ; ; ; ;
into the vector table. This code is no longer used, but is provided as a reference. Use this code if you want to build a branch to the IRQ handler and install it in the vector table */ MOV LDR
a2,#0x18 ; Pickup vector address a1,=(INT_Table + 32) ; Load address of handler
SUB a1,a1,a2 ; Subtract vector offset SUB a1,a1,#8 ; Allow for pipeline MOV a1,a1,LSR #2 ; Get a word offset; ORR
a1,a1,#0xea000000 ; Generate a branch
STR a1,[a2,#0] ; Load branch into vector
; BEGIN PID920t Board Specific Code for S3C2410x / ;
;/* Setup periodic timer interrupt and enable it */
;// first INTERRUPT SUB MASK (INTSUBMSK) REGISTER for S3C2410x / LDR a4,=0x7FF ; Get mask value STR a4,[a1,#0x1C] ; Mask off all Sub interrupts(INTSUBMSK)
;// all INTERRUPT is IRQ
LDR a4,=0x0 ; Get mask value STR a4,[a1,#0x4] ; all Sub interrupts(INTSUBMSK) is IRQ class.
;/ setup S3C2410x of interrption pritiroy / LDR a4,=0x00080000 = 01 REG2 优先 FOR TIMER0
LDR a1,=INT_CNTRL_BASE ; Get interrupt controller base LDR a4,=0xFFFFFFFF
; Get mask value
STR a4,[a1,#0x08] ; Mask off all interrupts(INTMSK)
;中断优先级为0（高0～5低?,REQ6
STR a4,[a1,#0x0C] ;Set Timer0(INT_TIMER0) interrupt mode ;/***********************S3C2410x******************************************/
;############################################################################### ;#
# ;# 设置定时器参数
#
;#
#
;###############################################################################
LDR a2,=TIMER_BASE ; Get timer base
;/***********************S3C2410x******************************************/
MOV STR
a4,#00 a4,[a2,#08]
;
;
Disable
timer0,timer1,timer2,timer3.timer4 reloader
;/***********************S3C2410x******************************************/
LDR a4,=0xA8 ;设置prescaler value STR a4,[a2] ; Store prescaler value to TCFG0 Register
;{prescaler value} = 0~255 ;prescaler value=0xA8 =168
LDR STR
a4,=0x03 ;设置定时器分频比divider value=16
a4,[a2,#0x04]
; Store Mode to TCFG1 Register divider
value=16
;{divider value} = 2, 4, 8, 16
;FCLK:HCLK:PCLK=1:1:1 ;FCLK=202.8 MHz=PCLK ;时钟TIMER0频率F0=PCLK/(15 +
1)/16=202800000/16/16=75000 Hz
;############################################################################### ;# # ;# 设置定时器频率
#
;# #
;###############################################################################
LDR a4,=TIMER_VAL ;设置定时器计数值 1/F0*TIMER_VAL=0.01 TIMER_VAL=F0 * 0.01 =750 =0x2EE STR
a4,[a2,#0x0C]
;Timer input clock Frequency = PCLK /
{prescaler value+1} / {divider value} ;默认PCLK＝FCLK，FCLK＝135 MHz
;Timer input clock Frequency = 135000 *
1000 / {126749+1} / 16
; for 10ms periodic interrupt,
;############################################################################### ;#
# ;# 设置定时器装载方式 # ;#
#
;###############################################################################
; [22:20] [19:16] [15:12] [11:8] [7:4] [3:0]
; 110 1010 1010 1010 0000 1010
; rTCON = 0x6aaa02; //Auto reload (T0=One-shot), Inverter off, Manual update, Dead zone disable, Stop
; #define rTCON (*(volatile unsigned *)0x51000008) //Timer control
;############################################################################### ;# # ;# 设定 timer0 从装和启动,开定时器 ;#
#
#
;###############################################################################
LDR
a4,=0x09
;Auto reload, Inverter off, Manual update, Dead zone
disable, Stop STR a4,[a2,#0x08]
;###############################################################################
;# # ;# 打开定时器中断服务
#
;# #
;##############################################################################
#
;/***********************S3C2410x******************************************/ LDR a4,[a1,#0x08] LDR a4,=0xfffffbff ; Get timer enable bit; a4=0x01<<10
STR
a4,[a1,#0x08]
; Enable Timer0 interrupt
; for 1ms periodic interrupt
;LDR a1,=INT_CNTRL_BASE ;LDR a4,=0xffffffff ;STR
a4,[a1,#0x10]
;STR a4,[a1,#0x0]
;str a4,[a1,#0x18] ; for 1ms periodic interrupt
;/***********************S3C2410x******************************************/
MOV STR
a4,#0x00
; Get timer enable bit; a4=0x01<<10 ; Enable Timer0 interrupt
a4,[a1]
; for 1ms periodic interrupt ;LDR a4, [a2, #TIMER_OFFSET] ;Read the timer value
; /* Call INC_Initialize with a pointer to the first available memory ; address after the compiler's global data. This memory may be used ; by the application. */
; INC_Initialize(first_available_memory); ;
; IMPORT INC_Initialize
MOV a1,a3 ; Pass the first available memory
B INC_Initialize ; to high-level initialization
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